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Found 3 papers, 2 papers with code
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
HLSFactory has three main stages: 1) a design space expansion stage to elaborate single HLS designs into large design spaces using various optimization directives across multiple vendor tools, 2) a design synthesis stage to execute HLS and FPGA tool flows concurrently across designs, and 3) a data aggregation stage for extracting standardized data into packaged datasets for ML usage.
HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis
Machine Learning (ML) has been widely adopted in design exploration using high level synthesis (HLS) to give a better and faster performance, and resource and power estimation at very early stages for FPGA-based design.
An Olfactory EEG Signal Classification Network Based on Frequency Band Feature Extraction
Considering these, the focus of this letter is to classify the olfactory EEG signals by exploiting the spectral-domain information of specific frequency bands.
