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Found 2 papers, 1 papers with code
AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers
Low-precision arithmetic operations to accelerate deep-learning applications on field-programmable gate arrays (FPGAs) have been studied extensively, because they offer the potential to save silicon area or increase throughput.
Unrolling Ternary Neural Networks
The computational complexity of neural networks for large scale or real-time applications necessitates hardware acceleration.
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