The efficient exploration of chemical space to design molecules with intended properties enables the accelerated discovery of drugs, materials, and catalysts, and is one of the most important outstanding challenges in chemistry.
Computational Engineering, Finance, and Science
Morpheus' performance is within 3% of a GPU design that has a quadruple-sized conventional LLC.
Method: We conducted a systematic literature review (SLR) to identify properties, understand origins and evolution, and describe the emergence of community smells.
We experimentally demonstrate on 56% real off-the-shelf DRAM chips that HiRA can reliably parallelize a DRAM row's refresh operation with refresh or activation of any of the 32% of the rows within the same bank.
Hardware Architecture Cryptography and Security
Motif analysis has been extended to a variety of network models that allow for a richer description of the interactions of a system, including weighted, temporal, multilayer, and, more recently, higher-order networks.
Social and Information Networks Data Structures and Algorithms Physics and Society
We show that universal densities, which estimate the differential entropy rate consistently, exist if the reference measure is finite, which disproves that the assumption of a finite alphabet is necessary in general.
Information Theory Information Theory Statistics Theory Statistics Theory 94A29 (Primary) 62M20 (Secondary)
FPGAs differ from traditional processing platforms such as CPUs and GPUs in that they are reconfigurable at run-time, providing increased and customized performance, flexibility, and acceleration.
Cryptography and Security Systems and Control Systems and Control
This paper considers the use of routerless networks-on-chip as an alternative on-chip interconnect for multiprocessor systems requiring hard real-time guarantees for inter-processor communication.
Performance Hardware Architecture Networking and Internet Architecture
In this paper, we propose the In-Network Accumulation (INA) method to further accelerate a DNN workload execution on a many-core spatial DNN accelerator for the Weight Stationary (WS) dataflow model.
Hardware Architecture Distributed, Parallel, and Cluster Computing
Our system is based on a wearable IMU-based motion capture system that is used for teleoperation and a VR headset for visual telepresence.