Implementing High-Order FIR Filters in FPGAs

12 Oct 2016 Födisch Philipp Bryksa Artsiom Lange Bert Enghardt Wolfgang Kaever Peter

Contemporary field-programmable gate arrays (FPGAs) are predestined for the application of finite impulse response (FIR) filters. Their embedded digital signal processing (DSP) blocks for multiply-accumulate operations enable efficient fixed-point computations, in cases where the filter structure is accurately mapped to the dedicated hardware architecture... (read more)

PDF Abstract
No code implementations yet. Submit your code now

Categories


  • DISTRIBUTED, PARALLEL, AND CLUSTER COMPUTING
  • HARDWARE ARCHITECTURE